Guidelines

THINK HARDWARE while coding RTL

Keep related combo logic in the same module

Isolate state machines from other logic

Isolate clock syncronizers into separate blocks

Behavioral level coding abstraction allows the design to be independent of timing and explicit sequencing

Avoid multiple clocks per block

Put all the clock related logic in a block

See that you dont have any logic at the top level and instead make it a list of instantiations

Module name same as file name

only one module per file

Register all outputs wherever possible

Implement next state combo using a case statement

Latches make DFT Scan insertion difficult if not impossible and also makes STA no easy.

To avoid latches: -

1. Assign a value to the output in every branch of a case statement
2. All if's and/or elseif's should end with an else

To implement muxes, use case statements exclusively.

Avoid full case and parallel case directives as much as possible

Multiple if statements result in the creation of a priority encoder structure